Programmable Digitalfilterasic Chip Design for Software Defined Radio
|School||Guilin University of Electronic Science and Technology|
|Course||Microelectronics and Solid State Electronics|
|Keywords||Software Defined Radio Interpolation Extract FRM Digital filter bank|
Up and down conversion module This paper studies a software radio hardware platform digital filter design and implementation of the group . The digital filter banks can meet the practical application of software radio processing multi-band , multi- mode high-speed broadband signal center frequency , bandwidth adjustable occupy fewer resources are easy to achieve the requirements . High-speed broadband signal processing , the use of traditional direct methods digital filter design will result in a high order , and thus higher complexity , take up more resources . Paper filter design using multi - level structure of low complexity - the CIC HB cascaded FIR filters for software radio digital filter center frequency , adjustable bandwidth requirements , and proposes a new design method - - interpolation , decimation , and the FRM technical design FIR digital filter . A narrow transition bandwidth of the digital filter used in the practical application of the method designed not only having a reassortant that can handle multi-band , multi-mode signal , and a low complexity and high system speed , in the hardware scale than the conventional filter can save a lot of hardware resources. Software radio system digital up and down conversion module specific parameters and performance requirements , the paper first determine the design of digital filter bank , and Matlab simulation to verify the feasibility of the program . Then using the Quartus II software design, RTL-level digital filter bank filter correctly feasibility of its comprehensive simulation design and layout . Finally PADS software to complete the software radio hardware circuit design and the completion of the structures of the corresponding hardware platform , the actual hardware test results verify the feasibility of the design of digital filter banks .