Experimental and theoretical studies of advanced CMOS high-k gate dielectric

With the development of integrated circuits, Moore's Law has been the driving integrated circuit, the basic unit, i.e. the metal - oxide - semiconductor field effect transistor (MOSFET) such as scaling. Etc. scaling, we must reduce the thickness of the gate oxide layer of 1 / k, which makes the physical thickness of the gate oxide layer to the maximum. When the thickness of the gate oxide layer can not be further reduced hours, in order to enhance the gate capacitance values, the only way is to increase the relative dielectric constant of the medium. This requires us to abandon the past 50 years have been using the SiO ₂ gate oxide layer, instead use relative dielectric constant of the material of high dielectric constant (High-k) media. For high-k gate dielectric problems encountered in the actual study, the high-k gate dielectric for advanced CMOS devices to carry out experimental and theoretical studies of the system. On the one hand, ALD (atomic layer deposition) and molecular beam epitaxy (Molecular Beam Epitaxy) were prepared high-performance Al2O ₃ HfO _{, 2} , Hf < sub> x the Al _y the O _z single crystal Od ₂ O ₃ and single crystal Nd ₂ O ₃ high-k gate dielectric medium, the system of the structure of their materials, process optimization, and electrical properties; On the other hand, by the first principles method System Hf-based High-k dielectric intrinsic point defects and impurity point defects on the high-k gate dielectric material and electrical properties. The results of this paper on the application of advanced CMOS devices, high-k gate dielectric has important academic value and significance. Firstly, molecular beam epitaxy method in high-quality epitaxial Si (100) single crystal the Gd ₂ O ₃ and Nd _{of 2} O -3 high-k dielectrics. W metal gate and Pt metal gate, and Forming Gas Annealing \the gate leakage current and interface state density. After the single crystal Gd _{of process optimization 2} O ₃ high-k gate dielectric has good electrical properties: (1) obtained Gd ₂ O ₃ a dielectric constant of 21.5; (2) Preparation of the single crystal Gd ₂ O-3 demonstrated excellent insulating properties, the room temperature leakage current 5.69 × 10 ^{-6 A / cm 2 (EOT = 1.4 nm), far below the International Technology Roadmap for Semiconductors 2010 low-power transistor gate leakage current requirements; (3) Gd ₂ O ₃ / Si (100) structure CV hysteresis voltage can be reduced to less than 10 mV, the interface state density dropped 10 11 cm -2 eV -1 to middleweight; research single crystal Nd ₂ the O ₃ gate dielectric / Si near-interface oxide layer defects (the NIOT). The use of low-frequency CV characteristic curve, the NIOT extracted by the electrical method. Study found the Nd ₂ O ₃ / Si (111) structure NIOT density of 3.75 × 10 12 cm -2 < / sup>, and Gf method to verify the measurement of the near-interfacial oxide layer defects; using state-of-the-art atomic layer deposition process the prepared Al ₂ O ₃ , HfO the ₂ and HfAlO _{, 3.5} high-k gate dielectric, to optimize the growth process. Si (100) substrates by HfAlO _3.5 high-k gate dielectric, 1 kHz to 100 kHz HfAlO _3.5 frequency of the high-k gate dielectric dissipation characteristics. Found that due to the parasitic resistance of the relationship, with the increase in frequency, the MOS capacitance density from 0.73μF/cm 2 down to 0.71μF/cm 2 . CV characteristic curve there is a kink in the vicinity of -0.5 V, indicating the presence of a slow interface state density. 100 kHz measured A1/HfAlO _3.5 / Si (100) MOS structure capacitance of the high-frequency CV characteristic curve, the Si band gap near the center of the interface state density and Terman method 5 × 10 11 cm -2 eV -1 to 1 × 10 12 cm -2 < / sup> eV -1 , and Hill-Coleman measurement method has been verified. In order to the A1 _{atomic layer deposition of high quality on a GaAs substrate 2} O ₃ high-k gate dielectric, proposed a new method of GaAs surface passivation, effectively inhibition of the oxidation reaction occurs in the GaAs substrate atomic layer deposition process of Al ₂ O ₃ . First, the GaAs surface vulcanization, then the vulcanization the the NH _{of GaAs at 500 ° C under 3} Atmosphere heat treatment for 5 minutes. The result is a stable nitride surface, inhibiting the oxidation of atomic layer deposition growth process of the oxide precursor on the surface, GaAs, and also to go except a serious impact on the electrical properties of MOS device GaAs surface elemental As, greatly enhance the Al / Al ₂ O ₃ / GaAs structure of accumulation capacitance density. The oxygen vacancy atomic structure and band structure of the Hf-based gate dielectric. Found from the energy band structure, the oxygen vacancies introduced in the middle of the HfO ₂ band gap gap state, Trap-Assisted Tunneling or Poole-Frenkel tunneling conduction mechanism of defect levels. The analysis showed that the F ions into the oxygen vacancy, substituted the role of the original oxygen ions, caused by the interaction of the 2p orbit of F ions, and Hf ions 5d orbit PD of hybrid orbital electronegativity of fluorine atoms is greater than the oxygen atom, gap state on the original Hf5d track pushed to the hafnium oxide above the conduction band, never fully passivated hafnium oxide in oxygen vacancies. Explained theoretically the F ions found in the experiment the the HfO ₂ oxygen vacancies passivation. The study found that the F ion the HFO ₂ and HfSiO ₄ medium passivation mechanism. In HfSiO ₄ , Si and Hf electrically positive difference in oxygen vacancies in the F accepted derived from Hf electrons, while the Si 2p orbit of the electron is pushed back from Si 2p orbit, causing Si ions having 7 extranuclear. The presence of Si ions, resulting in the inactivation of F-ion does not have the the HfSiO ₄ of oxygen vacancy. Analysis and comparison of F ions and N ions the HfSiO ₄ / Si structure in the gate voltage under the action of oxygen vacancies passivation effect. The study found that the leakage current the HfSiO ₄ -based MOS structure F ion better than N ions of oxygen vacancies passivation passivation of oxygen vacancies. However, when the gate voltage changes, F ions in the oxygen vacancies will cause the Si ions in the vicinity of charging and discharging. This is the usual sense of said slow interface state, N is simply the negative fixed charge. The device performance degradation due to the interface state is much larger than the influence of the fixed charge, therefore, N ion HfSiO ₄ oxygen vacancies inactivation than the F ion. First-Principles Cl, Ge and B impurities on the dielectric properties of hafnium-based high-k gate had a very good theoretical explanation to the observed phenomena. Cl residual impurities atomic layer deposition process brought HFO ₂ high-k gate dielectric electrical properties will have an impact. The analysis showed that the Alternate Bit Cl residual impurities in the MOS structure is a rechargeable discharge defects, will cause the the MOS structure hysteretic voltage increases; interstitial sites of residual Cl bar in the negative fixed charge in the MOS structure, MOS structure flat-band voltage biased. Cl residual impurities the HfSiO ₄ high-k gate dielectric electrical properties, similar to its role in HfO _{, 2} of. Ge atoms from the substrate diffusion into the HfO ₂ medium can form three kinds of defects that the V ₃ GE the V ₄ Ge and Ge gap defects. HfO _{, 2} / TiN metal gate structure of the Fermi level system, Ge defects in each case basic with negatively charged Ge defects in HfO ₂ / Ge interface overall negative fixed charge, resulting in positive shift of the flat band voltage of the MOS structure. The boron in HfO ₂ high-k gate dielectric two states exist, that gap defect B and V ₃ B defects. For a price gap B defects, introduced in the HfO ₂ of the band gap of the two-gap state, respectively, relative to the valence band top 2.53 eV relative to the bottom of conduction band 0.26 eV. In the pMOSFET working conditions, the hole by the substrate price with injected into in the HfO ₂ of the valence band, after a gap state will not have much impact. However, the first band gap states in the valence band of Si and HfO _{to 2} of the valence band under the presence of a defect in a certain concentration of the gap B between the electron from the substrate along this level toward the gate, which produce Trap-Assisted Tunneling. Therefore, the gate leakage current of the MOS structure is a major impact. For the first time, in theory, gives a full explanation of the high-k gate dielectric in B impurity pMOSFET threshold voltage instability. Spread to the HfO ₂ medium in boron in the the pMOSFET operating conditions, always positively charged, and therefore the threshold voltage of the system to the negative direction of drift, and to increase the turn-on voltage of the entire device. The same time, when the pMOSFET not work when, due to the substrate in the absence of the gate voltage, electronic multi-sub, these boron deficiencies will release positive charge, and a certain decline in the turn-on voltage of the device.}