Dissertation > Industrial Technology > Radio electronics, telecommunications technology > Basic electronic circuits > Multiplier, divider,inverter

Research of PLL, Frequency Doubler and Frequency Divider Based on Injection Locking Technique

Author LianZuo
Tutor LiWei
School Fudan University
Course Microelectronics and Solid State Electronics
Keywords injection locking Frequency Synthesizer VCO injection-lockedfrequency divider subharmonically injection-locked
Type Master's thesis
Year 2012
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Injection of a periodic signal into an oscillator leads to interesting locking and pulling phenomena. These effects prove important in today’s transceivers and frequency synthesizers. Injection locking technique has been widely used in the design of qudrature oscillators, dividers and doublers. Recently, subharmonic injection can be used to improve the phase noise of the phase locked loop (PLL). In order to get a better understanding of injection locking technique, an injection-locked PLL, injection-locked doubler and injection-locked divider are presented in this paper.In the beginning, the paper gives the basic theory of injection locking technique. The phase noise model of injection-locked VCO is also studied.In the following part, this paper gives a brief introduction about the architectures of the conventional PLL as well as some important specifications such as phase noise, jitter and locking time. Also how they influence the wireless communication system is addressed. By comparing some techniques to improve phase noise, a subharmonically injection-locked PLL is proposed.Then, the parameters of the loop are chosen based on the stability and noise performance. The noise transfer function of the injection-locked PLL is discussed in detail.Analysis of the circuits of the proposed frequency synthesizer is presented, such as injection-locked VCO, pulser generator, frequency divider, PFD/CP and injection-locked doubler. The locking behavior of the PLL and the reasons that might cause the loop to become out of lock are studied and verified by simulation. The frequency synthesizer is designed and implemented using TSMC0.13um CMOS process.At last the paper presents an injection-locked frequency divider with low power and wide locking range for Ku-band application.

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