Dissertation > Industrial Technology > Radio electronics, telecommunications technology > Communicate > Communication theory > Signal processing

Study on the Crucial Techniques of BPM Shortwave Baseband Signal Processing Digital Timing Receiver

Author JiaoMingTao
Tutor HuaYu
School Graduate School , Chinese Academy of Sciences ( National Time Service Center )
Course Communication and Information System
Keywords IIR filter adaptive filter data match filter peak value search FPGA
CLC TN911.7
Type Master's thesis
Year 2012
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The thesis analyzed the features of the receiving and transmitting of BPM shortwave timeservice system and the signal propagation, which were based on the realization of thedigitization of BPM shortwave time service system and the improvement of its function.According to the theory of the BPM shortwave receiver, we proposed some criticaltechnologies, such as: digital filter technique, frequency control technique, digital signaldemodulation techniques digital matching filter technique and peak value searchingtechnique.After analyzing the critical techniques of the BPM shortwave digital timing receiver, thethesis analyzed and tested the IIR digital filter, ANF_ALE, coastas demodulate annuluscircuit, signal search with the data match filter peak value search, signal capture timingcontrol technique and the output of1PPS. Based on the emulation result of the digital simulation,the thesis complete the logic accomplishment of the receive system on the project flat, and thenwe used the Quartus II’s simulator tool and with the aid of MATLAB to accomplish largernumbers of simulation data, which have made a functional test of the critical techniques ofhardware. We ensured the correctness of each module and the feasibility of the processing ofshortwave BPM signal through the simulation analysis of each critical techniques functionaltest.Based on the validation of the correctness and feasibility of each module, we combinedall the modules and debug them. Through the debug we can find out that how many chipresources is expended in the project and we can confirm the data width between each module.Then, we can choose optimal chips for the project. After that, transplanting the entire modulefrom the function flat to the project former flat and validating the correctness and feasibilityof them on the new flat. We make a long time test and note of the1PPS’s timing index basedboth on simulative signal san real signal. The analysis of the statistical result validates thefeasibility and advantage of the digital BPM shortwave receiver.

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