Research on Audio Active Denoise Systems
|School||Nanjing University of Posts and Telecommunications|
|Course||Electronics and Communication Engineering|
|Keywords||adaptive algorithm active denoise LMS FPGA|
Audio active denoise systems have two input signals. The first is a complicated signal whichincludes an errorless signal and a background noise. The second is a reference noise. There is thegreat correlation between the background nois and the reference noise. According to the algorithm,active denoise systems get subtraction between the first signal reduces the second signal. The outputof the denoise system is the errorless signal. Active denoise systems are better than passive denoisesystem which can’t adjust itself when the signal environment has a sudden change. The differencebetween the denoising ability of the system and the classic filters such as LPF, HPF and BPF is thatthe active denoise system can eliminate the background noise whose frequency is the same as theerrorless signal.The active denoise systems are widely used to serve the mobile terminal, such as Crystal Talkof Motorola, diamond voice of Sumsung and Micphone array of Apple. Those denoise system is onthe ARM platform and their sampling rate is only8KHz. The frequency range of audio which thehuman ears can feel is from20Hz to20KHz. Acorrding to Nyquist sampling theorem, thesampling frequency of audio is twice of the frequency of audio that it is40KHz. The active denoisesystems on mobile phones are not able to meet the qualification. The sampling rate of the newactive denoise system is rised up to48KHz, so the new active denoise system can receive thewhole audio which the human ears can feel. When the sampling rate is48KHz or more, the normaldenoise systems can’t handle this. This thesis introduce a new denoise system which is for highsampling rate signals. The core of this denoise system is VSSLMS algorithm which complexity islow. VSSLMS alogorithm is on the FPGA platform which is good at signal processing. The FPGAchip works faster than the ARM chip, because FPGA chip is parallel computing and ARM chip isserial computing. The denoise system is with automatic self test. When the denoise system starts,the denoise system will adjust the parameters of itself. According to the test report, the maximumSNR of the denoise system is15dB and the maximum gain is17dB.The detail of work arragent of the thesis is as follow.First, I researched the adptive algorithms which are LMS algorithm and VSSLMS algorithm.VSSLMS algorithm is more important than the other for the thesis, because the active denoisesystem which the thesis puts forward is base on VSSLMS algorithm. There are four importantparameters in the VSSLMS algorithm which is stepsize genetic factor, instant error energy factor, maximum value of convergence stepsize, minimum value of convergence stepsize. After analysiswith the Matlab, simlulation software, I found that these parameters have effects on the activedenoise systems indirectly through stepsize.Second, I researched active denoise systems on mobile phones and designed a new activedenoise systems which core is VSSLMS algorithm. The new active denoise system includeshardwares and softwares. The hardwares are FPGA, logical chip, wm8731, audio chip and so on.The softwares are a top module program and five submodule programs which are VerilogHDLprograms and designed by Quartus II. The active denoise system has some functions such as systeminitialization, self-adjustment of denoise system and so on. The denoise system is perfect and itsouput is an errorless HIFI audio.Last, I analysed the performance of the active denoise system which includes signal to noiseratio, gain and value of the misadjustment.