Design of I~2C/SPI Bus for Digital Output Sensor
|School||Harbin Institute of Technology|
|Course||Microelectronics and Solid State Electronics|
|Keywords||I~2C SPI sencor|
In this information age with the rapid development of digital integratedcircuits, sensors are alsogradually developed to digital and highly integrated.Digital data collected by the sensor, transmittedvia the bustothe processor, and thebus is the bridge between them. SPI and I~2C serial bus have advantages of a simplecircuit structure and a wide range of applications. So the topic chooses these twoUniversal Serial Interface, SPI andI~2C to achieve digital sensor application needs.With the intensive study of SPI and I~2C bus architecture, the principle ofoperation and the bus specification, and the special circumstances of the subject,the simplex function to achieve. The design of the bus interface is from the device’sdigital sensor. First, use the Modelsim development tool written in Verilog HDLRTL level code, description of the circuit logic function, and use software tosimulate the master and slave, the functional simulation of the RTL code. Second,the functional simulation of the RTL code for Altera FPGA code refactoring, thendownloaded the reconstructed code to the Altera FPGA development platform forFPGA prototyping, to verify the correctness of the code in the logic function. Then,use the integrated tools, SPI and I~2C bus the RTL code for logic synthesis andoptimization. Aimed at the timing constraints, use Soc Encounter automaticplacement and routing, and final complete the layout.The subject uses digital IC design flow to complete the design. The leastsignificant bit bus transfer rates greater than48kbps can be able to correctly andefficiently complete the data transmission function. The core area of the SPI businterface circuit is to approximately7160.7μm~2and the I~2C bus interface circuitcore area is to approximately2521.4μm~2. Both of them can meet the designrequirements.