Design and Implementation of Tentative Turntable Control System Based on SOPC Technology

Motor control is a widely used technology. There is a variety of digital controller,traditionally development of digital controller is generally related to communication ofchips with different functions, which affect the efficiency of the system in a certainextent. With the rapid development of the technologies of LSI(large-scale integratedcircuit) and SOC(System on Chip), SOPC(System on Personal Chip) technology as anew solution of SOC was proposed by Altera corporation in the beginning of twentycentury. The core will be embedded in the FPGA chip by SOPC technology where userscan develop the IP cores, SOPC was applied in many fields. Take above narrtive as thebackground; the researchment and development of using SOPC technology in theturntable controller were carried out, aiming at taking the advangtage of SOPC to thecontrol field. Based on the design of the overall system, we discuss and complete thehardware circuit of the digital controller developed on FPGA, hardware developmentand configuration of the SOPC, and software programming of the core embedded intoFPGA, complete the development of controller on personal chip, which could reducethe equipment’s volume, improve the efficiency of running algorithm, at the same tine,fully take advantages of developing flexibly and parallel running of FPGA.By analying the overall structure of the tentative turntable control system, thispaper completes the platform circuit of digital controller based on FPGA, includingpower supplies, off-chip memory, serial communication, filter circuit of PWM and soon. In addition, the conversion circuit of resolver based on the AD2S80A was completed,and then completed the debug work, last link the circuit to the motor system containeddriver, complete the structure of the closed-loop control system.Take the needs of motor controller into account before the design of FPGA and thedevelopment of SOPC system. Use the SOPC Builder and Nios II IDE to enmbed theNios II core into FPGA, and develop the IP core based on specification of Avolon bus.The processing circuit module of AD2S80A’s date and the four-segments and directionidentifying circuit module of incremental photoelectric encoder are completed andintegrated on FPGA chip, which makes the IO bus used fully, simplifies thedevelopment of application and increases the versatility of the device; in allusion to thedesign of PID control algorithm, the IP core of cntorl algorithm are designed, whichmakes running algorithm combined with the parallel running nature of FPGA; other IPcore, including PWM, serial communication, timers, are designed and configured in thecondition of considering the needs of congtroller. Simulation test of the above modulesare completed and the results prove the logic function of each module’ validity.The core’s programme of SOPC system are completed on the base ofaccompliashing the design and discrete processing of control system, which achives the algorithm and the calling the different functions, and then the test is carried on thetentative turntable system, the results prove the congtroller based on SOPC technologycan meets the needs, can be expanded and copied flexibly, and syncretizes theadvantages of SOPC technology.