Dissertation
Dissertation > Industrial Technology > Automation technology,computer technology > Computing technology,computer technology > Electronic digital computer (not a continuous role in computer ) > Arithmetic unit and the controller (CPU)

Research on Low Power Techniques of the Instruction Fetching Unit in Embedded Processors

Author GaoJinJia
Tutor WangWeiWei;MengJianZuo;ChenZhiJian
School Zhejiang University
Course Circuits and Systems
Keywords Fetch unit Low power consumption Instruction cache Branch target cache Road forecast Loop filter Branch Trail
CLC TP332
Type Master's thesis
Year 2012
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The low-power embedded processor research direction , and the fetch unit contains a large number of memory accesses , power consumption has become an important part of the whole processor power . This paper focuses on the embedded processor fetch unit of the key components of low -power technology . The application of these innovative technologies enables an embedded CPU , effectively reducing the fetch unit dynamic power consumption on the basis of maintaining processor performance . The main content of this paper and innovations include : a to predict cache low power , road link relations based on the command history . In this paper, a branch target buffer ( BTB) complex with two jumps and jump historical links between table way prediction architecture , a very low cost hardware to solve the conflict of the branch target instruction where improved jump turn pre - forecast accuracy to take the road , thus effectively reducing the dynamic power of instruction Cache . 2 branch target cache -based access to the body of the loop filter low-power technology . BTB access for the body of the loop instruction redundant power consumption issues , the paper proposes a circular access filtering mechanism to eliminate the body of the loop in sequential instruction instruction stream BTB invalid access ; further proposed a branch tracking method for compensation due to loop filter mechanism of Sino-African cycle class of the loop body branch instruction error filter caused the loss of performance . Both technologies protect the processor performance based on reducing the dynamic power consumption of the BTB . In this paper, the low-power technology is designed to be simple , low-cost hardware , embedded processor fetch unit low-power design is of positive significance .

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