Research and Realization of Precision Clock Synchronization Protocol
|School||Harbin Institute of Technology|
|Course||Instrument Science and Technology|
|Keywords||Precision Time Protocol Ethernet clock synchronization LXI|
Ethernet has been applied in the field of test and measurement and industrial automation with the development of its technology nowadays, which, lead to the network test and control system. However, Ethernet can not meet real-time requirements for test and control system. Moreover, the existing network time synchronization protocols such as NTP, which declares an precision of millisecond level still can not meet the high-precision time synchronization requirements. Then IEEE 1588 standard comes up to resolve the problem by defining PTP.At the beginning, the thesis introduces ordinary clock, boundary clock and clock status in PTP, analyses PTP domain and PTP communication mechanism, studies best master clock and then put forward formulas for clock variance calculating. This thesis designs two methods to implement PTP on the basis of in-depth research on PTP. One is software implementation, the other is FPGA implementation.Software implementation is deployed on Linux platform. Best master clock algorithm is used to decide whether the PTP clock is master clock or slave clock in the thesis. In order to improve the accuracy of the clock synchronization, timestamps which represents sending and receiving time of the message passing through NIC driver is introduced as well as time offset is calculated by means of clock synchronization algorithm. This thesis designs clock correcting system to synchronize local clock to the master clock. The status of the clock is converted according to the protocol engine state machine.FPGA is used to capture timestamps in FPGA-based PTP implementation. Different from software implementation, PTP messages detecting, timestamps capturing, frequency-adjustable real-time clock are based on FPGA. Timestamps are captured between physical layer and MAC layer, which could eliminate protocol stack’s delay and jitter as well as improve synchronization precision. In addition, Reading the internal real-time clock’s time of the FPGA as the timestamps, then use the timestamps to calculate the offset between the master and the slave clock to fix the real-time clock of the FPGA. Finally, two PTP implementations are deployed on LXI instrument respectively, and synchronization precision is tested and analyzed. Results show that software implementation achieves a level of microsecond synchronization accuracy, while FPGA-based PTP implementation achieves sub-microsecond synchronization accuracy level.