A High-Speed and Real-Time Data Acquisition System Based on FPGA
|School||Harbin Institute of Technology|
|Keywords||Data Acquisition FPGA DMA|
With the rapid development of astronautical technology in China, the requirement of High-speed Data Acquisition Technology has became higher and higher as one of the most important part in astronautical experiment area. This design accomplishes a real-time and high-speed data acquisition system based on FPGA, with the acquisition requirement for deflagrating press apex in 10N satellite engine‘s pulse ignition experiment as its design index.The bandwidth of analog input signal in this system is DC~80kHz .The speed of real-time acquisition is up to 5Msps with 12 bits and the dual channel data cache capacity is 32MB.On the design of the hardware circuit, the differential analog signal arranged by AD8138 accomplishes the modulus transition synchronously after passing AD9238. The data digitized are cached into SDRAM of large capacity and finally transmitted into PC through the PCI bus. In order to increase the electromagnetic compatibility of this system, analysis is made in detail of the key signal’s return current and the electromagnetic environment in which the system works and the best routing strategy is presented of multilayer circuit board.In order to realize the real-time data acquisition, two key technologies are dealt with the toggle control of the hardware controller on SDRAM and the DMA transition of the PCI bus. Popular EDA tools are used cooperatively to accomplish the simulation, synthesis and hardware fitting of the control logic, eliminate the sequences that violate rules in the design, and realize the reliable storage and transmission of sampled data.Through the dynamic link with drivers, the application software of the system is designed under the platform of LabWindows/CVI. The approach of the parallel multithreaded running is adopted so that the speed of data transmission is increased further and the operating time of software is saved.The tested results indicate that the data acquisition module has met the requirement of design with 70.8dB signal-to-noise ratio and 11.07 effective digits.