Dissertation
Dissertation > Industrial Technology > Machinery and Instrument Industry > Instruments, meters > Thermal measuring instruments > Flow Meter

Ultrasonic flowmeter related hardware correlators

Author ZhouHuiYing
Tutor WangZiBin
School University of Electronic Science and Technology
Course Measuring Technology and Instruments
Keywords Related ultrasonic flowmeter Field programmable gate array Fast Fourier Transform Correlators
CLC TH814
Type Master's thesis
Year 2008
Downloads 239
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Ultrasonic flowmeter of the ultrasonic transmission fluid in the flow rate of fluid flow on the information set , and then by a simple , reliable signal processing method , put the information into the traffic flow information . Ultrasonic flowmeter with previous conventional flowmeters , compared with the required low cost, easy to install, does not alter the flow of fluid , does not produce additional resistance measurements , etc., is an ideal energy-saving flowmeter. Measuring range and high precision ultrasonic flowmeter is related research hotspot . Related ultrasonic flowmeter by detecting two ( or more channels ) from the pipeline of the received ultrasonic signal to obtain the flow velocity correlation . Related mathematical algorithms to achieve very much , we use the FFT (fast Fourier transform ) IFFT implementation-dependent manner . The FPGA (field programmable gate array ) in recent years, the rapid development of high-speed processing in dealing with real-time scheduling is relatively simple signal processing performance over DSP, so this topic using FPGA FFT. In this paper, the development status of the ultrasonic flowmeter began to introduce the principle of ultrasonic flowmeter related , indicating that the FFT realize the significance of this issue . This paper studies how to use FPGA FFT processor , including algorithm selection, system architecture design , each module design , FPGA implementation and testing . Designed using base -2 DIT ( Time taken ) algorithms to QUARTUS6.0 as the software platform , using VHDL language depicts the way to achieve the 512 block floating point 16bits complex structure of the FFT system, based on the FFT processor a correlator . Finally, ALTERA development board for the validation.

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