Dissertation > Industrial Technology > Radio electronics, telecommunications technology > Microelectronics, integrated circuit (IC) > ASIC

The electrical properties of the SOI SOI DRAM test as well as low-power design

Author LiChuanLi
Tutor YuYueHui;ZouShiChang
School Shanghai Institute of Microsystem and Information Technology Research Institute
Course Microelectronics and Solid State Electronics
Keywords Electrical properties Low power consumption Design Research SOI material SOI technology Bulk silicon circuit Anti-radiation High temperature Simulation Peripheral circuits
Type Master's thesis
Year 2002
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Compared with the traditional bulk silicon circuit, the the SOI circuit has the advantages of high-speed, low-voltage, low-power, anti-radiation, high temperature. But the SOI material production cost is relatively high, so the original application is mainly confined to the military, aerospace and other fields to produce high temperature and radiation resistance circuit, with the development of SOI substrate technology, SOI Park films continue to reduce costs SOI into the civilian become possible. With the development of mobile communications, laptop computers and other portable electronic products have become increasingly demanding integrated circuit in terms of power consumption and volume, SOI will become a mainstream technology to achieve low-voltage, low-power. SOI materials, devices, circuits, test, simulation, design, workmanship is very important in this paper is divided into three parts. The first section summarizes the course of development of the SOI technology development trends facing enormous challenges. In this section, the focus summarized the superiority of SOI technology relative to traditional bulk silicon technology, SOI materials prepared by the method process SOI new device characteristics and processes, as well as the SOI technology in anti-radiation, high-temperature, high-speed within the field of low-power, low-voltage applications and progress. Second part, we studied SOI DRAM structure on the high performance and low power consumption design, the design of a low voltage low power SOI DRAM array model describes the design of the logical structure of the DRAM design, the design of the storage unit, a memory array, and read / write circuits and peripheral circuits design. Completion of the storage array, control circuit, the timing of the peripheral circuit design, schematic design, layout, and by the DRC, LVS check. Meanwhile, we have for our circuit and device simulation. We analyzed the advantages of SOI technology applied to our SOI DRAM circuit can be obtained, and for the design of the circuit and a conventional bulk silicon circuits were compared. The third part, we have carried out in-depth research on the electrical properties of the SOI material devices test. For different SOI materials with conventional bulk silicon material on the structure, respectively, with three different electrical properties of the test model to the electrical characterization of the SOI material. The three models are: First, the traditional MOS capacitor structure is applied to the SOI material up conducted CV, IV testing, analysis of electrical performance parameters to calculate the SOI material; second, for the special structure of the SOI material, in order to adapt production line electrical performance testing requirements for lossless SOI Park films, the electrical properties of the SOI material characterization apply MOSOS structure. Third, in order to simplify the electrical properties of the test structure of the SOI material, so that its test, analysis, calculate the digest is compatible with conventional MOS model, by introducing a coupling factor, the conventional MOS model testing methods, formulas introduced SOI the material of the C-V, I Mateo testing process. Application of the SIS model for the electrical characterization of SOI materials. The subject by the CAS Knowledge Innovation Project \

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