Design and Test of Amplified Circuit of the Optical Receiver
|Course||Microelectronics and Solid State Electronics|
|Keywords||Twin photodiodes Optical receiver Current -mode feedback amplifier Open circuit time constant method A printed circuit board|
With the development of silicon deep sub-micron integrated circuits , the frequency characteristics of the MOS transistor is also gradually increase the MOS transistor the fT value has more than 100GHz . Silicon optoelectronic integrated receiver became active , and the advantages of the silicon-based optical receiver is that it has the powerful functions of various IC support , the price is relatively cheap , the disadvantage is that the shorter wavelength response , and the response speed is relatively low . In optical storage systems, and within a short distance . Multichannel parallel transmission limit is not subject to these disadvantages . Abroad OEIC receiver is still in the research stage , developed with independent intellectual property rights for the optical fiber transmission of high-speed integrated circuits is of great significance for the development of China 's information industry and the building of the information superhighway , and the optical receiver is one of the most important a ring . OEIC receiver , compatible with standard CMOS to achieve fast , low-noise detectors and high-gain , wideband and low noise amplifier circuit . Therefore, we have adopted a dual photodiode with shallow trench isolation (STI) structure (DPD) as a detector ; using current -mode negative feedback amplifier (CFA) as a receiver preamplifier ; using active inductor amplifier as the main amplifier. The main research work are : 1 ) design compatible with standard CMOS processes with STI structure DPD detector . Device simulation to grasp the the DPD mechanism of work to improve the speed and responsiveness . 2) OEIC optical receiver design and simulation . The mechanism of to reveal the CFA broadband high-speed through the open-circuit time constant method , the design speed of 1Gb / s, gain up to 60dB receiver amplifier circuit . 3) the test chip . The above design DPD detector test to obtain a dark current of less than 30pA , the degree of response to 0.066A / w . Needed to design a high-speed PCB test board , and let the the MPW tapeout with detector chip bonding system testing , very good frequency characteristics .