Research on Parallel Demodulation Techniques of High Data-rate Satellite Signal
|School||PLA Information Engineering University|
|Course||Signal and Information Processing|
|Keywords||Parallel demodulation Timing synchronization Carrier Synchronization Digital AGC FPGA Re-encoding|
Modem technology is the core technology of satellite data transmission systems, high-rate signal digital modulation and demodulation technology is of great significance for the research and development of high-speed data transmission system. Due to the algorithm complexity and digital device performance constraints, high-speed, real-time signal demodulation to achieve a high degree of difficulty. To this end, we propose to to use the parallel demodulation ideas to solve this problem. Based on this idea, this paper mainly to complete the following tasks: the establishment of a parallel demodulation model. Can be reduced by parallel processing, the data processing rate, thereby reducing the demodulation algorithm and a digital device performance requirements. Parallel demodulation model assigned by the data, the baseband signal is demodulated, re-encoding, the data combiner and re-encoding the recovery of several modules. Timing synchronization on a joint basis of the the Gardner algorithm and the maximum average power algorithm, combined with the characteristics of parallel demodulation, and put forward the idea of ??transmission parameters. This algorithm is at the expense of a small amount of computation in exchange for the convergence rate of the loop, passed as an argument to further reduce the initial timing error, speed up the convergence of the loop, reducing the bit error rate of the initial data, are better able to adapt to parallel demodulation requirements. Carrier recovery, the combination of parallel demodulation characteristics in the conventional carrier recovery loop based on the idea of ??the transmission parameters on the loop filter. This method reduces the acquisition time of the algorithm and the initial segment of the symbol error rate is suppressed to improve the BER performance of the entire system. The digital automatic gain control (AGC), on the basis of the analysis and simulation, similar to the idea of ??using the carrier recovery, the parameters passed on the automatic gain control loop integrator. This method significantly reduces the stabilization time of the average signal power, which can adjust the amplitude of the signal as soon as possible to improve the system performance. Parallel demodulation data distribution combiners, data distribution, data duplication and data matching data combiner program. In addition, for the multi-channel signal ambiguity is not unified, this paper first proposed the re-encoding method, simple and effective solution to this problem. After conducting research to improve the above each module to achieve a three-way parallel parallel twice deceleration QPSK demodulator FPGA design, and overall debugging. Finally Agilent signal generator E8267D signal is generated, the test results show that the parallel demodulator successful completion of the multiplexed signal is demodulated and data.